ExpertTimers & Logic
Four-Bit Ripple-Carry Adder
Scale the full-adder design to four bits and watch each carry propagate to the next stage.
Parts from the database
Other supplies
- breadboardsCommon build supply
- 5 V supplyCommon build supply
- nine switches and nine 10 kΩ pull-downsCommon build supply
- five LEDs and five 1 kΩ resistorsCommon build supply
- six 100 nF capacitorsCommon build supply
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Connections
- Power each DIP-14 at pin 14/+5 V and pin 7/ground with 100 nF. Inputs are A0–A3, B0–B3, and Cin, each with a pull-down.
- For each bit i, use an XOR for Pi=Ai XOR Bi and a second XOR for Sumi=Pi XOR Carry_i; Carry_0=Cin.
- For each bit, compute Gi=Ai AND Bi and Hi=Pi AND Carry_i, then OR Gi/Hi for Carry_(i+1). Use the datasheet gate pin diagrams and label each node.
- Display Sum0–Sum3 and final Carry4 on LEDs. Tie all unused logic inputs low.
Build steps
- Build bit 0 as a full adder and validate all eight rows.
- Add bit 1 and confirm 1+1 carries.
- Continue bits 2 and 3, keeping carry paths labelled.
- Check 0011+0101=1000 and 1111+0001=1 0000.
Software and firmware setup
This is a hardware-only circuit; no firmware is required.
Test your build
The five LEDs represent A+B+Cin as a five-bit binary result after gate propagation settles.
Troubleshooting
- Only later bits fail: trace the previous stage carry before checking sum logic.
- Inputs float: add missing pull-downs.
- Random outputs: tie unused inputs and check breadboard rails.
Safety and limitations
Educational 5 V logic circuit only; low LED current, not a powered-machine controller.
Manufacturer and platform documentation
Community Notes for This Project
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